Categorical Improvement Not Required for Obviousness

The motivation-to-combine analysis for obviousness is a flexible one under patent law. “[A]ny need or problem known in the field of endeavor at the time of invention and addressed by the patent can provide a reason for combining the elements in the manner claimed.” KSR Int’l Co. v. Teleflex Inc., 550 U.S. 398, 420 (2007). And “[a] person of ordinary skill is also a person of ordinary creativity, not an automaton.” Id. at 421. “[A] court can take account of the inferences and creative steps that a person of ordinary skill in the art would employ.” Id. at 418.

“[I]f a technique has been used to improve one device, and a person of ordinary skill in the art would recognize that it would improve similar devices in the same way, using the technique is obvious unless its actual application is beyond his or her skill.” KSR, 550 U.S. at 417. This is the so-called “known-technique” rationale. So, if a known technique addresses a known problem using “prior art elements according to their established functions,” then there is a motivation to combine. Intel Corp. v. Qualcomm Inc., 21 F.4th 784, 799–800 (Fed. Cir. 2021). “It’s not necessary to show that a combination is the best option, only that it be a suitable option.” Id. at 800 (cleaned up) (emphasis in original).

Secondary Cache as a “Suitable Option”

In Intel Corp. v. PACT XPP Schweiz AG, No. 22-1037, — F.4th — (Fed. Cir. Mar. 13, 2023), Intel asserted that a person of ordinary skill would have been motivated to combine the prior art because they “relate to the same field of multiprocessor . . . systems” and “address the same problem: maintaining cache coherency.”  Specifically, the prior art taught that a segmented cache is one of two “primary mechanisms” that accomplished cache coherency.

The Federal Circuit found that such a combination would constitute a use of Bauman’s secondary cache “according to [its] established function[].” Intel, 21 F.4th at 799–800.

Intel never had to show that replacing Kabemoto’s secondary cache with Bauman’s secondary cache was an “improvement” in a categorical sense. . . . Intel just had to show that Bauman’s secondary cache was a “suitable option” to replace Kabemoto’s secondary cache. Intel, 21 F.4th at 800 (emphasis omitted).

            It’s enough for Intel to show that there was a known problem of cache coherency in the art, that Bauman’s secondary cache helped address that issue, and that combining the teachings of Kabemoto and Bauman wasn’t beyond the skill of an ordinary artisan. Nothing more is required to show a motivation to combine under KSR . . . .


The patent attorneys at Thomas P. Howard, LLC prosecute patent applications before the USPTO, as well as in enforce patents or defend against infringement in litigation nationwide including in Colorado.